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OneSpin Solutions provides certified IC integrity verification solutions for use across the entire System-on-Chip (SoC) design flow. These solutions assure that designs are functionally correct, safe and meet stringent safety compliance standards, trusted and secure.
Automated apps are increasingly critical to successful formal verification flows. These apps complement traditional formal techniques and help democratize this type of verification processes by automating and dramatically streamlining common verification tasks.
Solutions are divided into four categories:
Rigorous coverage-driven functional verification from block to chip, leveraging unique formal technology.
Automatic detection of systematic design errors introduced by design refinement tools (e.g., synthesis) to exhaustively verify equivalence of RTL to synthesized netlist to final place & route (P&R).
Safety analysis to meet the strict certification requirements of functional safety standards such as ISO 26262 for automotive, IEC 61508 for industrial, and DO-254 for avionics.
Automatic detection of RTL Trojans and hardware vulnerabilities to adversary attacks.
We want to help you to stay productive and meet your verification challenges. Simply make a no obligation appointment with one of our experienced application engineers. We are looking forward to learn about your requirements and give you a demo of our solutions.
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Rigorous coverage-driven functional verification from block to chip, leveraging formal technology
OneSpin provides a complete formal-based solution for the verification of RTL designs from the IP and block level to complete systems-on-chip (SoCs), as well as verification of implementation in FPGA devices.
Functional safety analysis to meet the requirements of ISO 26262, IEC 61508, DO-254 and other standards
OneSpin’s Functional Safety Verification Solution provides automated functional safety analysis that enables an efficient, predictable path to standard compliance.
ISO 26262 | DO-254 | DO-330 | IEC 61508 | EN 50128
Automated detection of hardware Trojans and vulnerabilities to adversary attacks
Hardware assurance (HwA) is critical to build secure systems from the ground up. OneSpin takes a holistic approach to IC integrity, providing solutions that verify not only functional correctness and safety but also trust and security.
Thorough verification of complex SoC platforms used for 5G wireless, IoT, and AI applications
System-on-chip (SoC) designs have for some time included heterogeneous processors. Traditional CPUs have grown into multiprocessor subsystems while GPUs and other specialized compute engines have also resided on the same chip. But heterogeneous computing platforms take this architecture two steps further, by also including both FPGA-style programmable logic and software-programmable engines. These features greatly increase the flexibility available to users to implement their desired functionality in hardware, software, or a combination of both.
Systematic bug elimination and metrics on proper handling of random errors in the field
Industrial applications, most notably nuclear power plants, have many similar characteristics to the automotive domain. There is strong motivation to eliminate systematic errors, survive random errors, and thwart adversary attacks. Another common aspect to industrial and automotive applications is the presence of established standards such as ISO 26262 for automobiles and other road vehicles, EN 50128 for railways, and IEC 61508 for industrial safety systems.
ISO 26262 is a widely cited example of a standard with precise requirements that directly drive robust IC verification flows. It divides errors into systematic errors in the design and random errors in the field. OneSpin’s Functional Reliability Solution leverages innovative formal technologies to span the full range of verification to eliminate systematic errors. The solution includes automatic checks in DV-Inspect™, automated formal analysis provided by multiple apps, and the full assertion-based verification capabilities of DV-Verify™. The exhaustive nature of formal means that it is possible to prove exhaustively that a design meets its specification.
Once the RTL design has been fully verified, OneSpin’s EC-ASIC™ and EC-FPGA™ use formal equivalence checking to ensure that the implementation through synthesis and place-and-route does not alter design functionality.
Quick and exhaustive verification and proof of compliance to instruction set architecture (ISA) with no gaps or inconsistencies
The OneSpin RISC-V™ Integrity Verification Solution is the industry’s first commercial tool suite to address the needs of both core providers and core integrators. It leverages OneSpin’s advanced formal verification expertise for automotive and other high-integrity processor applications to exhaustively verify the implementation with minimal set up and runtime. The core of the solution is the formalization of the RISC-V ISA as a set of SystemVerilog Assertions (SVA) using the unique OneSpin® Operational Assertion approach. Operational SVA enables high-level, non-overlapping assertions that capture end-to-end transactions and requirements in a concise, elegant way.